Hey, I’m currently studying for the CompTIA A+ exam using Mike Meyers’ book. My approach is to read through the material, eliminate the filler content, and note down everything in bullet points. I plan to use a memory palace to help retain the information. However, I don’t use memory techniques very often, so I’d appreciate your input on how you would go about memorizing material like this.
A small part from chapter 3/CPUs:
- Cache :
- Because the CPU runs faster than the RAM can supply it with code, you’ll always get pipeline stalls called wait states because the RAM can’t keep up with the CPU.
- To reduce wait states, CPUs come with built-in, very high-speed RAM called static RAM (SRAM).
- The moment you double-clicked an icon, Windows started sending many programs to the CPU.
- Each of these programs breaks down into some number of little pieces, called threads, and data. (threads are a series of instructions designed to do a particular job with the data)
- Most applications have certain instructions and data that get reused many times.
- SRAM preloads as many instructions as possible and keeps copies of already run instructions and data in case the CPU needs to work on them again.
- SRAM used in this fashion is called a cache.
- Motherboard makers began adding caches, around 128 to 512 KB large, directly to the motherboards.
- When the CPU looked for a line of code, it first went to the built-in cache; if the code wasn’t there, the CPU went to the cache on the motherboard.
- The cache on the CPU was called the L1 cache because it was the one the CPU first tried to use.
- The cache on the motherboard was called the L2 cache, not because it was on the motherboard, but because it was the second cache the CPU checked.
- Eventually, engineers added the L2 cache onto the CPU package, then eventually right onto the CPU chip.
- Many modern CPUs include three: an L1, an L2, and an L3 cache (Intel calls it Smart Cache).
- The L1 cache was in the CPU and thus ran at the speed of the CPU, while the L2 cache connected to the CPU via a tiny set of wires on the CPU package.